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Hpe®_SAP - Semi Automatic Partitioner
Every buyer of a multi FPGA board will get cost- free, semi-automatic partitioning software. This allows the developer to move every entity from every level
by dragging and dropping them into an FPGA. During this task the utilization and the interconnection will be checked. The partitioning tool works only with VHDL.
But this will change within 2008. The tool needs only ALTERA Quartus®II, no additional expensive software will be required. |
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This picture shows the working window of our partitioning tool.
You can see the design tree and the 2 FPGA. Every bubble represents
an entity. Every entity can be moved into any FPGA, the system check the
utilization of the FPGA’s and the number of interconnections.
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